Virtual machine: Difference between revisions

From LibreDevelop
Jump to navigation Jump to search
No edit summary
No edit summary
Line 91: Line 91:
| 28 || MW [Op1], Op2 || Memory write || Write data Op2 to memory address Op1
| 28 || MW [Op1], Op2 || Memory write || Write data Op2 to memory address Op1
|-
|-
| 29 || LC Op1 || Load constant || Load constant parameter from program memory to Op1
| 29 || SKIP Op1 || Skip next instruction || Skip next instruction if Op1 is non zero
|}
|}



Revision as of 11:08, 25 October 2015

Specially designed virtual machine is useful for testing compiler, operating system and it is also necessary for running applications under operating system which need to be CPU architecture independent and should be either interpreted or compiled to native code.

Objectives

  • Support various data width (bit width 8, 16, 32, 64, ...)
  • Simple to be implemented
  • Effective execution also in interpreting mode
  • Mostly register oriented instructions
  • Stack support
  • Instruction set should be extensible

=Features

  • Instructions
    • Constant loading
    • I/O ports
    • Stack
    • Subroutines
    • Jumps
    • Arithmetic operations
    • Logic bitwise operations
    • Bit manipulation
    • Shifts
    • Special instructions
  • Registers
  • Memory addressing
  • Flags
  • Interrupt system

Instructions

Code Short name Full name Description
0 NOP No operation
1 CP Op1, Op2 Copy Copy data from one operand to another
2 CMP Op1, Op2 Compare Compare two operands
3 INC Op1 Increment Increment operand by one
4 DEC Op1 Decrement Decrement operand by one
5 IN Op1, (Op2) Input Read data to Op1 from I/O port Op2
6 OUT (Op1), Op2 Output Write data Op2 to I/O port Op1
7 HALT Halt Stops execution of program
8 ADD Op1, Op2 Addition Add Op2 to Op1
9 SUB Op1, Op2 Subtraction Subtract Op2 from Op1
10 MUL Op1, Op2 Multiplication Multiply Op1 by Op2
11 DIV Op1, Op2 Division Divide Op1 by Op2
12 MOD Op1, Op2 Modulo Set Op1 to remainder of division of Op1 by Op2
13 AND Op1, Op2 Logical AND Set Op1 to logical AND of Op1 and Op2
14 OR Op1, Op2 Logical OR Set Op1 to logical OR of Op1 and Op2
15 XOR Op1, Op2 Exclusive OR Set Op1 to logical XOR of Op1 and Op2
16 CALL Op1 Call subroutine Store return address to stack and jump to given address by Op1
17 RET Return from subroutine Return to address stored on top of stack
18 SHL Op1 Shift left Shift all bits in Op1 to the left
19 SHR Op1 Shift right Shift all bits in Op1 to the right
20 JP Op1 Jump to absolute address Set program counter to new absolute address
21 JR Op1 Jump to relative address Set program counter to new address relative from current
22 PUSH Op1 Push to stack Put Op1 to the top of stack
23 POP Op1 Pop from stack Pop Op1 from the top of stack
24 BIT Op1, Op2 Test bit Test if bit at position Op2 in Op1 is set
25 SET Op1, Op2 Set bit Set bit at position Op2 in Op1 to 1
26 RES Op1, Op2 Reset bit Set bit at position Op2 in Op1 to 0
27 MR Op1, [Op2] Memory read Read data Op1 from memory address Op1
28 MW [Op1], Op2 Memory write Write data Op2 to memory address Op1
29 SKIP Op1 Skip next instruction Skip next instruction if Op1 is non zero

Operands

Bit width
Register Native 8-bit 16-bit 32-bit 64-bit 128-bit
Constant 0 16 32 48 64 80
R1 1 17 33 49 65 81
R2 2 18 34 50 66 82
R3 3 19 35 51 67 83
R4 4 20 36 52 68 84
R5 5 21 37 53 69 85
...
R14 14 30 46 62 78 94
R15 15 31 47 63 79 95